1. Field of the Invention
The present invention relates to a technology for controlling an interface between a control unit and a memory unit in an image processing apparatus.
2. Description of the Related Art
Currently, an advanced technology attachment (ATA) bus is available as an interface standard for interfacing a peripheral device, such as a hard disk drive (HDD), to a host system. Initially, data transfer through the ATA bus was performed by using a parallel data transfer method. However, the data transfer rate in a parallel ATA bus (Ultra ATA133) is 133 MB/s at a maximum and can hardly be increased further.
Meanwhile, in recent times, apart from being used in a server or a personal computer (PC), an HDD has a wide range of applications in, e.g., household appliances, mobile devices, and image processing apparatuses such as printers, copying machines, and multifunction products (MFPs). Following the increasing use of the HDD and rapid enhancement in the storage density thereof, it has become necessary to provide a compatible high-speed interface for HDDs.
To satisfy the demand for a high-speed interface, a next generation interface standard called serial ATA bus has been developed. Unlike the parallel ATA bus, data transfer through the serial ATA is performed by using a parallel data transfer method. A first generation serial ATA bus has a data transfer rate of 150 MB/s, i.e., higher than the parallel ATA bus. Moreover, the development of a future serial ATA bus having a data transfer rate of 300 MB/s or 600 MB/s is also underway.
The serial ATA bus includes four functional layers: a physical layer, a link layer, a transport layer, and an application layer. The physical layer has an ability to perform high-speed signal transmission and reception. Moreover, the physical layer interprets a received signal and transmits interpreted information to the link layer, and outputs a signal based on a request from the link layer. The link layer requests the physical layer to output a signal upon a request from the transport layer and transmits that signal to the transport layer. The transport layer converts a received signal into an ATA-compatible signal. The application layer corresponds to a user related circuit such as a direct memory access interface (DMA I/F) or a software application.
More particularly, the physical layer performs data conversion between serial data and parallel data, 8B/10B encoding, and clock data recovery (CDR). The link layer performs generation and control of a communication protocol, generation of a cyclic redundancy check (CRC), and scrambling. The transport layer performs format embedding or format decomposition of an HDD command or HDD data to obtain data in a transferable format. The application layer maintains compatibility with a conventional ATA bus and a software application thereof. Thus, a driver software application of a conventional ATA bus can be used as it is for the serial ATA bus. In that sense, the application layer is equivalent to the conventional ATA bus.
As described above, in recent times, the HDD is used in an image processing apparatus such as a printer, a copying machine, or an MFP for storing image data. Thus, the performance of the image processing apparatus largely depends on the data transfer rate with respect to the HDD. Moreover, it is also necessary for the image processing apparatus to maintain compatibility with conventional software applications. In this light, it is now a requisite to use a serial ATA bus and an HDD compatible to the serial ATA bus in image processing apparatuses.
By the way, Japanese Patent Application Laid-open No. 2005-78514 discloses a technique to reduce power consumption of an electronic device by efficiently using a power saving function of a serial ATA bus included therein. More particularly, when issuing or reception of a predetermined command is detected, the reduction in power consumption is achieved by putting the serial ATA bus in a power saving mode after execution of that command is complete.
Meanwhile, because full-duplex data transfer method is implemented in the serial ATA, the serial ATA bus constantly performs communication with a connected HDD even when no data transfer is being performed therebetween. In other words, the physical layer and the link layer in the serial ATA bus are always operating. This increases the power consumption of the HDD. Moreover, because the physical layer is made of an analog circuit, the power consumption increases further.
To solve such a problem, a power management mode, in which no communication is performed with a connected HDD except when there is a data transfer, is adopted in the serial ATA bus to reduce the power consumption of the HDD. Specifically, a serial signal line in the physical layer is neutralized. However, the serial ATA standard describes a method for controlling the power management mode (transition of a serial ATA bus between a power management mode and a normal mode) only for the physical layer, the link layer, and the transport layer. There is no description of a method for controlling the power management mode for the application layer.